1. Technical Field
The present disclosure relates to a multiphase signal divider.
2. Description of the Related Art
A multiphase signal refers to a set of signals having a waveform, for example sinusoidal or square wave, wherein the individual components of the multiphase signal, i.e., the individual signals it is comprised of, are constantly phase shifted to one another and show a monotonic phase increase when passing from one signal to the next signal. A typical example of a multiphase signal generator is a loop oscillator used, for example, as a voltage controlled oscillator or VCO in a phase locked loop or PLL. The loop oscillator comprises a loop of N identical delay cells, every cell having a determined delay Td. The oscillation frequency is given by fosc=½*N*Td. If every output of the delay cell is taken to the output of the VCO, the loop oscillator provides N output signals, every signal oscillating at the fosc frequency but each having a phase difference 2π/N with respect to the closest signal. The multiphase signal comprises the set of N signal where the phase of every single signal monotonically increases by an equal space of 2π/N when passing from a signal to the next one. The phase difference between the individual signals of the multiphase signal may be expressed by T/N where T is the period of the multiphase signal.
The multiphase signals are often used in receivers having a serial interface in order to provide the sampling phases required for the latches that sample the received serial data.
In communication schemes, phase locked loops or PLLs are often employed on which the architectures of transmitters and receivers are based.
In U.S. Pat. No. 7,323,913, a multiphase divider is described for a serial connection receiver based on a PLL with a phase rotating device (also P-PLL). The phase locked loop or PLL includes a voltage controlled oscillator or VCO adapted to generate a multiphase signal, a multiphase signal divider, a phase rotating device having at the input the signals at the output of the phase divider and a reference signal and being adapted to generate a control signal of the VCO oscillator. The multiphase divider has a plurality of resettable dividers configured so as to achieve resettable division stages for a plurality of multiphase signals forming a plurality of divided multiphase signals having a monotonic phase increase with equal space and an ideal duty cycle of 50%, where the plurality of the divided multiphase signals has not any phase ambiguity. The multiphase divider includes a reset signal generator designed to provide a plurality of periodical reset signals to the plurality of resettable dividers in order to enable the plurality of resettable dividers to divide the plurality of multiphase signals in a correct time sequence to form the divided multiphase signals. The plurality of periodical reset signals is yielded by means of a combination network of the reset signal generator. The combination network is designed to generate a number of pulses based on the plurality of multiphase signals, thus achieving a plurality of decimation stages and where the periodical reset signals are generated in response to the plurality of multiphase signals.
A communication system with transmitter and receiver where the receiver includes the abovementioned multiphase divider will exhibit a higher circuital complexity due to the presence of the reset signal generator. In addition, the use of reset signals does not allow the system to be fast as resetting the divider stages of the multiphase divider is needed.